The next evolution of semiconductor fabrication replaces FinFET transistors with nanosheet architectures, delivering a 15% performance uplift and 30% reduction in power consumption.
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The next evolution of semiconductor fabrication replaces FinFET transistors with nanosheet architectures, delivering a 15% performance uplift and 30% reduction in power consumption.
The relentless cadence of Moore’s Law continues as commercial chip foundries transition to the 2-nanometer process node. By transitioning from FinFET to Gate-All-Around (GAA) nanosheet transistors, chip designers have achieved superior electrostatic control over sub-atomic leakage currents.
Backside Power Delivery Networks
Alongside GAA architecture, 2nm nodes introduce Backside Power Delivery (BSPDN). By separating power rails from signal routing lines and placing power delivery on the back of the silicon wafer, fabs have eliminated voltage drops and improved standard cell utilization by up to 20%.
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